The present invention relates to preparation methods for making porous polymer dielectric film that is useful in the manufacturing of future integrated circuits (“IC's”). In particular, the present invention relates to preparation methods for making a porous polymer film from a distinct precursor, or homo-transport polymerization (“HTP”). Thus, HTP avoids the need of using a dissimilar precursor, which was utilized in U.S. patent application Ser. No. 10/207,652 (“the '652 application”), entitled “Porous Low k (≦2.0) Thin Films by Transport Co-polymerization,” and filed on Jul. 29, 2002 with Lee, et al., listed as inventors. The current invention discloses methods to maximize a dielectric's physical properties (e.g. Young's Modulus). Additionally, the post treatment methods of this invention can be used to retain the chemical integrity on the dielectric film surface after exposure to a chemical process (e.g. reactive plasma etching). The post-treatment methods disclosed herein assure good adhesion and film integrity to a subsequent top layer film.
Although not wanting to be bound by theory, multiple layers of films are deposited during the manufacture of an IC, and maintaining the compatibility and structural integrity of the different layers throughout the various processes involved in finishing the IC is important. In addition to a dielectric layer and conducting layer, a “barrier layer” is also included. The “barrier layer” may include metals, metal nitrides, and silicides (e.g. Ti, Ta, W, Co, TiN, TaN, TaSixNy, TiSixNy, WNx, CoNx and CoSiNx). Ta is currently the most useful barrier layer material for the fabrication of future IC's that use copper as conductor. The “cap layer or etch stop layer” normally consists of dielectric materials such as SiC, SiN, SiON, silicon oxide (“SiyOx”), fluorinated silicon oxide (“FSG”), SiCOH, and SiCH.
The schematic in FIG. 1 is used to illustrate some fundamental processes involved for fabrication of a single Damascene structure and future IC's. During fabrication of future ICs, for instance, first a dielectric 110 is deposited on wafer using a Spin-On or Chemical Vapor Deposition (“CVD”) dielectric. A photoresist is then spun onto the substrate and patterned using a photo mask and UV irradiation. After removal of the unexposed photoresist, a protective pattern of cured photoresist is formed over the underlying dielectric. A via in the dielectric layer is then created by plasma etching of the dielectric that is not protected by the photoresist. A thin layer (50 to 200 Å) of barrier metal 130, such as Ta, then can be deposited using physical vapor deposition (“PVD”) method. This is followed by deposition of a very thin (50 to 100 Å) layer of copper seed 150 using PVD or Metal-Organic CVD (“MOCVD”). Following deposition of the barrier or seed layers, the via is filled with copper 140 using an Electro-Chemical Plating (“ECP”) method. Chemical Mechanical Polishing (“CMP”) may be needed to level the surface of the Damascene structure. Optionally, a cap-layer can be deposited over the dielectric before coating of photoresist and photolithographic pattering of the dielectric. The cap-layer can be used to protect the dielectric from mechnical damage during CMP.
Currently, there are two groups of low ε dielectric materials, (a) a traditional inorganic group, and (b) a newer organic polymer group. The traditional inorganic group is exemplified by SiO2, fluorine doped SiO2 products, as well as C and H doped products of SiO2. Commercial fluorine doped SiO2 products are exemplified by FSG. The C and H doped SiO2 products (e.g. SiOxCyHz) are exemplified by Black Diamond (available from Applied Materials Inc.), and Coral (available from Novellus Inc.), respectively. The newer organic polymers are exemplified by SiLK, which is available from Dow Chemical Company. Unfortunately, none of the dielectric materials that are used in the mass manufacturing of current-IC's can be used for the mass production of future-IC's because they are inadequate for the physical demands required. For example, the inorganic group and organic polymer group materials mentioned above are inadequate for their continued use as dielectrics in future-IC production because they have high dielectric constants (ε≧2.7), low yield (<5–7%), and marginal rigidity (Young's Modulus is less than 3.8 GPa). In contrast, the low k (<2.0) thin porous film of this invention has a low dielectric constant of equal or less than 2.0, a Young's Modulus of at lest 5 GPa, and pore sizes of less than 30 Å, which makes the invention described herein useful for fabrication of 0.065 to 0.045 μm IC's.